The present disclosure relates to integrated circuit design and, more particularly, to techniques for automated attribute propagation and hierarchical consistency checking for non-standard extensions.
During checking of an integrated circuit during the design phase of the integrated circuit, hardware defects or failures may be automatically detected. However, some hardware defects or failures may not be automatically detected using existing techniques and instead are only detectable by labor intensive manual review of data. For example, an analog signal wire may be passed through a digital buffer. This type of defect or failure is undetectable by existing automated techniques. Instead, manual check is performed, but this manual process is time-consuming and error-prone and consumes a significant number of man-hours.